xxperm

VSX Vector Permute

xxperm XT, XA, XB, XC

Performs a vector permute operation on the contents of three VSX registers.

Details

Permutes bytes from two 128-bit VSX registers (XA and XB) using a control vector in XC to produce a 128-bit result in XT. Each byte in the control vector specifies which byte from the 32-byte concatenation of XA and XB is selected into the corresponding output byte. This is a VSX category instruction with no effect on condition registers.

Pseudocode Operation

concat ← XA || XB
for i ← 0 to 15
  control_byte ← XC[8*i:8*i+7]
  idx ← control_byte[1:4]
  XT[8*i:8*i+7] ← concat[8*idx:8*idx+7]

Programming Note

The xxperm instruction requires VSX (Vector Scalar Extensions) to be enabled in the MSR register. Ensure that the control vector register is correctly set up, as it defines how the source bytes are permuted. This instruction operates on 32-byte vectors and can be used for tasks like data reordering or encryption. Be cautious of alignment requirements; the VSX registers must be properly aligned to avoid exceptions.

Example

xxperm vs1, vs2, vs3, vs4

Encoding

Binary Layout
18
0
T
6
A
11
B
16
AX
21
BX
29
TX
30
 
Format XX4-form
Opcode 0xF00000D0
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B
  • XC
    Control