fadd

Floating Add

fadd FRT,FRA,FRB
fadd. FRT,FRA,FRB

Adds the contents of two floating-point registers and places the result into another register.

Details

The floating-point operand in register FRA is added to the floating-point operand in register FRB. The result is rounded to the target precision under control of RN and placed into register FRT.

Pseudocode Operation

if 'fadd' then
    FRT <- (FRA) + (FRB)
else if 'fadd.' then
    FRT <- (FRA) + (FRB)
    CR1 <- result class and sign

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Example

fadd f1, f2, f3

Encoding

Binary Layout
63
0
FRT
6
FRA
11
FRB
16
00000
21
21
Rc
 
Format A-form
Opcode 0xFC00002A
Extension Floating-Point
Registers Altered FPSCR, CR1, CR0

Operands

  • FRT
    Target FPR
  • FRA
    Source FPR A
  • FRB
    Source FPR B