divuq
Divide Unsigned Quadword
divuq vD, vA, vB
Divides a 128-bit unsigned integer by a 128-bit unsigned integer.
Encoding
Binary Layout
4
0:5
vD
6:10
vA
11:15
vB
16:20
9
21:31
Operands
-
vD
Target -
vA
Dividend -
vB
Divisor
Example
divuq vd, va, vb
Related
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Divides a 128-bit unsigned integer (vA) by a 128-bit unsigned integer (vB), storing the 128-bit unsigned quotient in vD. This is a VSX or MMA category instruction that performs quadword division. If division by zero is attempted, the result is undefined.
Operation
vD ← vA ÷ vB (128-bit unsigned integer division)