divde

Divide Doubleword Extended

divde RT, RA, RB

Divides the contents of two registers and updates the condition register.

Encoding

Binary Layout

31

0:5

RT

6:10

RA

11:15

RB

16:20

OE

21

425

22:30

Rc

31

 

Format XO-form

Opcode 0x7C000352

Extension Base

Operands

• RT
  Target
• RA
  Dividend
• RB
  Divisor

Example

divde r3, r4, r5

Registers Altered

CR0, XER

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For divde, the quotient of the contents of register RA (dividend) divided by RB (divisor) is placed into register RT. The operands are interpreted as signed integers.

Operation

if 'divde' then
    RT <- (RA) ÷ (RB)

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.