addze

Add to Zero Extended

addze RT, RA

Adds a register, 0, and the Carry bit.

Encoding

Binary Layout

31

0:5

RT

6:10

RA

11:15

00000

16:20

OE

21

202

22:30

Rc

31

 

Format XO-form

Opcode 0x7C000194

Extension Base

Operands

• RT
  Target Register
• RA
  Source Register

Example

addze r3, r4

// r3 = r4 + CA

Registers Altered

CR0

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Adds the value in RA, zero, and the Carry bit (XER[CA]), storing the result in RT. This instruction is commonly used to propagate a carry or decrement by one when combined with other arithmetic operations. Condition register CR0 is updated if Rc=1; overflow is recorded in XER[OV] if OE=1.

Operation

RT ← RA + 0 + XER[CA]
if OE = 1 then
  (OV, CA) ← overflow and carry results
if Rc = 1 then
  CR0 ← (RT == 0, RT < 0, RT > 0, XER[SO])

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.