addex

Add Extended using alternate carry bit

addex RT,RA,RB,CY

Adds the contents of two registers and an alternate carry bit, updating the condition register.

Details

For addex, the sum of the contents of register RA, RB, and CY is placed into register RT. If CY=0, the sum (RA) + (RB) + OV is placed into register RT. For CY=0, OV is set to 1 if there is a carry out of bit 0 of the sum in 64-bit mode or there is a carry out of bit 32 of the sum in 32-bit mode, and set to 0 otherwise. OV32 is set to 1 if there is a carry out of bit 32 of the sum.

Pseudocode Operation

if CY=0 then
    RT ← (RA) + (RB) + OV

Programming Note

An addc-equivalent instruction using OV is not provided. An equivalent capability can be emulated by first initializing OV to 0, then using addex. OV can be initialized to 0 using subfo, subtracting any operand from itself.

Example

addex r3, r4, r5, 1

Encoding

Binary Layout
31
0
RT
6
RA
11
RB
16
CY
21
170
23
 
Format XO-form
Opcode 0x7C0000AA
Extension Base
Registers Altered CR0, XER

Operands

  • RT
    Target General Purpose Register
  • RA
    Source General Purpose Register
  • RB
    Source General Purpose Register
  • CY
    Alternate Carry Bit