vrldmi

Vector Rotate Left Doubleword then Mask Insert

vrldmi VRT,VRA,VRB

Rotates the contents of a vector register left by a specified number of bits and inserts the result into another vector register under control of a mask.

Encoding

Binary Layout

00011

0:5

SH[5:0]

6:10

VX[4:0]

11:15

VY[4:0]

16:20

VB[4:0]

21:31

Format VX-form

Opcode 0x100000C5

Extension VMX (AltiVec)

Operands

VRT
Target Vector Register
VRA
Source Vector Register
VRB
Source Vector Register
VX
Target Vector Register
VY
Source Vector Register
VB
Mask Vector Register
SH
Shift Amount

Example

vrldmi v1, v2, v3

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Rotates each doubleword element of VRA left by the number of bits specified in VRB, then inserts the rotated result into VRT under control of a mask derived from corresponding bits in VRB. No condition flags are affected.

Operation

for i in 0 to 1 do
  shamt ← (VRB[i*64+58:i*64+63]) & 0x3F
  dword ← (u64)VRA[i*64:(i*64+63)]
  rotated ← (dword << shamt) | (dword >> (64 - shamt))
  mask ← Generate_Mask_From_VRB(i)
  VRT[i*64:(i*64+63)] ← (VRT[i*64:(i*64+63)] & ~mask) | (rotated & mask)
end for

Programming Note

The vrldmi instruction is used for rotating doubleword elements and performing masked insertions. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. Be cautious with the alignment of source and target vectors to avoid unexpected results. This operation requires supervisor privilege level.