vspltw

Vector Splat Word

vspltw vD, vB, UIM

Copies a single word element from the source vector into all four word elements of the destination.

Encoding

Binary Layout

0:5

6:10

UIM

11:15

16:20

652

21:31

Format VX-form

Opcode 0x1000028C

Extension VMX (AltiVec)

Operands

vD
Target
vB
Source
UIM
Element Index (0-3)
VRT
Target Vector Register
VRB
Source Vector Register

Example

vspltw v1, v2, 0

// Broadcast word 0 to all lanes.

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Vector Splat Word copies a single word element (32 bits) from the source vector VRB at position UIM into all four word elements of the destination vector VRT. UIM selects one of the four words (0-3) in the source. This is a VMX/AltiVec instruction.

Operation

word ← VRB[4×UIM : 4×UIM+31]
VRT[0:31] ← word
VRT[32:63] ← word
VRT[64:95] ← word
VRT[96:127] ← word

Programming Note

The vspltw instruction is used to replicate a selected word from one vector register into all words of another vector register. Ensure that the Vector Facility (MSR.VEC) is enabled; otherwise, a Vector_Unavailable exception will be raised. The index 'b' is derived by concatenating the UIM field with four zeros, and it specifies which 32-bit word to replicate. This instruction operates at the user privilege level.