vsubsws

Vector Subtract Signed Word Saturate

vsubsws vD, vA, vB

Subtracts 4 signed words with saturation.

Details

The vsubsws instruction performs a vectorized subtraction of signed words from two source vectors, saturating the result to the range [-128, 127]. If the result exceeds these bounds, it is clamped to the nearest boundary value, and the SAT flag in the VSCR register is set.

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
do i = 0 to 15
    src1 ←EXTS(VSR[VRA+32].word[i])
    src2 ←EXTS(VSR[VRB+32].word[i])
    result ←src1 - src2
    if result > 127 then
        VSR[VRT+32].byte[i] ←127
        SAT ←1
    else if result < -128 then
        VSR[VRT+32].byte[i] ←-128
        SAT ←1
    else
        VSR[VRT+32].byte[i] ←result
    end
end

Programming Note

The vsubsws instruction is useful for performing vectorized subtraction of signed words with saturation, ensuring that results do not overflow. Ensure that the VEC bit in the MSR register is set to enable vector operations; otherwise, a Vector_Unavailable exception will be raised. Be aware that the SAT flag in the VSCR register indicates if any result was saturated during the operation.

Example

vsubsws vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
1920
21
 
Format VX-form
Opcode 0x10000780
Extension VMX (AltiVec)
Registers Altered MSR, VSCR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B