drintx

Decimal Floating-Point Round To FP Integer With Inexact

drintx R,FRT,FRB,RMC

Rounds a decimal floating-point number to the nearest integer and places it into a floating-point register.

Encoding

Binary Layout

0

0:5

R

6:10

FRT

11:14

FRB

15

RMC

16:20

Rc

21:31

 

Format Z23-form

Opcode 0xEC0000C6

Extension Decimal Floating-Point

Operands

• R
  Rounding mode control bit
• FRT
  Target Floating-Point Register
• FRB
  Source Floating-Point Register
• RMC
  Rounding mode control field

Example

drintx 0, f1, f3, 0

Registers Altered

FPSCR, (FPRF, FR, FI, FX, XX), VXSNAN, CR1, (if, Rc=1), CR0

Related

More in Decimal Floating-Point

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The DFP operand in FRB is rounded to a floating-point integer and placed into FRT. The sign of the result is the same as the sign of the operand in FRB. The ideal exponent is the larger value of zero and the exponent of the operand in FRB. The rounding mode used is specified by RMC.

Operation

if 'drintx' then
    FRT <- round(FRB, RMC)
    if result differs from FRB then
        raise inexact exception

Extended Mnemonics

Extended Mnemonic	Equivalent Instruction

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.