ddedpdq

Decimal Decode DPD Quad-Precision

ddedpdq vD, vB, SP

Decodes BCD to 128-bit DFP.

Encoding

Binary Layout

63

0:5

vD

6:10

SP

11:15

vB

16:20

322

21:30

/

31

 

Format X-form

Opcode 0xFC000284

Extension Decimal Floating-Point

Operands

• vD
  Target
• vB
  Source
• SP
  Sign

Example

ddedpdq vd, vb, 0

Registers Altered

FPSCR

Related

More in Decimal Floating-Point

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Decodes a binary-coded decimal (BCD) value from vB into a 128-bit decimal floating-point number, storing the result in vD. The sign field SP specifies how to interpret the sign encoding in the BCD representation. The instruction converts BCD digits to the internal DFP representation. The instruction is part of the Decimal Floating-Point extension.

Operation

vD ← DecodeDFP128(vB, SP)

Programming Note

The ddedpdq instruction is used to convert a DPD-encoded decimal value from one register to BCD format in another. Ensure that the source register contains valid DPD data; otherwise, the result will be undefined. This operation does not require any specific privilege level but may alter the FPSCR register based on the conversion outcome.