bcdcpsgn.

Decimal Copy Sign VX-form

bcdcpsgn. VRT,VRA,VRB

Copies the sign of a decimal value from one register to another while preserving the magnitude.

Encoding

Binary Layout

4

0:5

VRT

6:10

VRA

11:15

VRB

16:31

 

Format VX-form

Opcode 0x10000341

Extension Decimal Floating-Point

Operands

• VRT
  Target Vector Register
• VRA
  Source Vector Register
• VRB
  Source Vector Register

Example

bcdcpsgn. v1, v2, v3

Registers Altered

CR6, FPSCR

Related

More in Decimal Floating-Point

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The bcdcpsgn. instruction copies the sign of the decimal value in VSR[VRB+32] to the decimal value in VSR[VRA+32], placing the result into VSR[VRT+32]. If either input is an invalid encoding, the result is undefined.

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
inv_flag ←(VSR[VRA+32].nibble[31] < 0xA) |
            (VSR[VRB+32].nibble[31] < 0xA)
do i = 0 to 30
    inv_flag ←inv_flag |
                (VSR[VRA+32].nibble[i] > 0x9) |
                (VSR[VRB+32].nibble[i] > 0x9)
end
src_sign ←(VSR[VRB+32].nibble[31] = 0xB) |
            (VSR[VRB+32].nibble[31] = 0xD)
eq_flag  ←(VSR[VRA+32].nibble[0:30] = 0)
lt_flag  ←(eq_flag=0) & (src_sign=1)
gt_flag  ←(eq_flag=0) & (src_sign=0)
result.nibble[0:30] ←VSR[VRA+32].nibble[0:30]
result.nibble[31]   ←VSR[VRB+32].nibble[31]
VSR[VRT+32] ←inv_flag ? undefined : result
CR.bit[56]  ←inv_flag ? 0b0 : lt_flag
CR.bit[57]  ←inv_flag ? 0b0 : gt_flag
CR.bit[58]  ←inv_flag ? 0b0 : eq_flag
CR.bit[59]  ←inv_flag

Programming Note

The bcdcpsgn. instruction is used to copy the sign of a decimal value from one vector register to another, while preserving the magnitude. Ensure that both input vectors are valid decimal encodings; otherwise, the result is undefined. This instruction operates at the user privilege level and does not raise exceptions for invalid inputs, instead setting CR6 bits accordingly.