ddivq

Decimal Divide Quad-Precision

ddivq vD, vA, vB

Divides two 128-bit DFP numbers.

Details

The ddivq instruction performs a decimal divide operation on the operands in FRA[p] and FRB[p]. The result is rounded to the target-format precision under control of DRN (bits 29:31 of the FPSCR) and placed in FRT[p].

Pseudocode Operation

FRT[p] ← Round(FRA[p] / FRB[p], DRN)
if Rc = 1 then
    SetFPSCRFields()
end if

Programming Note

The ddivq instruction is used for performing decimal division with quad-precision operands. Ensure that the operands are correctly aligned and formatted to avoid precision loss. The result rounding mode is controlled by the DRN field in the FPSCR register, so verify this setting before execution. This instruction operates at a privilege level that allows access to floating-point registers and may raise exceptions if operands are invalid or division by zero occurs.

Example

ddivq vd, va, vb

Encoding

Binary Layout
63
0
vD
6
vA
11
vB
16
546
21
/
31
 
Format X-form
Opcode 0xFC000442
Extension Decimal Floating-Point
Registers Altered FPSCR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B