xsnmsubasp

VSX Scalar Negative Multiply-Subtract Type-A Single-Precision

xsnmsubasp XT,XA,XB

Performs a negative multiply-subtract operation on single-precision floating-point values.

Details

For xsnmsubasp, the double-precision floating-point value in doubleword element 0 of VSR[XA] is multiplied by the double-precision floating-point value in doubleword element 0 of VSR[XT], and then the result is negated and added to the double-precision floating-point value in doubleword element 0 of VSR[XB]. The final result is normalized, rounded to single-precision using the rounding mode specified by RN, negated, and placed into doubleword element 0 of VSR[XT] in double-precision format. Doubleword element 1 of VSR[XT] is set to 0.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src1 ←bfp_CONVERT_FROM_BFP64(VSR[32×AX+A].dword[0])
src2 ←bfp_CONVERT_FROM_BFP64(VSR[32×TX+T].dword[0])
src3 ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[0])
v ←bfp_MULTIPLY_ADD(src1, src3, bfp_NEGATE(src2))
rnd ←bfp_NEGATE(bfp_ROUND_TO_BFP32(FPSCR.RN, v))
result32 ←bfp32_CONVERT_FROM_BFP(rnd)
result64 ←bfp64_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if vximz_flag=1 then SetFX(FPSCR.VXIMZ)
if vxisi_flag=1 then SetFX(FPSCR.VXISI)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if xx_flag=1 then SetFX(FPSCR.XX)
vx_flag ←vxsnan_flag | vximz_flag | vxisi_flag
vex_flag ←FPSCR.VE & vx_flag
if vex_flag=0 then do
    VSR[32×TX+T].dword[0] ←result64
    VSR[32×TX+T].dword[1] ←0x0000_0000_0000_0000
    FPSCR.FPRF ←fprf_CLASS_BFP32(result32)
    FPSCR.FR  ←inc_flag
    FPSCR.FI  ←xx_flag
else do
    FPSCR.FI  ←0b0
end

Programming Note

This instruction is commonly used in applications requiring complex floating-point arithmetic, such as scientific computations and graphics processing. Ensure that the VSX (Vector Scalar Extensions) are enabled by checking the MSR.VSX bit; otherwise, handle the VSX_Unavailable exception. Be cautious of potential exceptions like VXSNAN, VXIMZ, Vxisi, OX, UX, and XX, which can alter the FPSCR flags and affect program flow. The instruction operates on double-precision values but rounds the result to single-precision, so consider precision implications in your application.

Example

xsnmsubasp vs1, vs2, vs3

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
1160
21
 
Format XX3-form
Opcode 0xF0000488
Extension VSX
Registers Altered FPSCR, VSR[XT]

Operands

  • XT
    Target Vector-Scalar Register
  • XA
    Source Vector-Scalar Register
  • XB
    Source Vector-Scalar Register