stxvw4x

Store VSX Vector Word*4 Indexed

stxvw4x XS, RA, RB

Stores four words from a vector (unaligned).

Details

Stores four 32-bit word elements from a VSX vector register XS into memory at an unaligned address computed as RA+RB. The effective address is calculated by adding RA (or 0 if RA=0) and RB, and the four words from the source register are written to consecutive memory locations. This VSX extension instruction does not affect condition registers and permits unaligned access.

Pseudocode Operation

EA ← (RA = 0) ? RB : RA + RB
[EA:EA+3] ← XS[0:31]
[EA+4:EA+7] ← XS[32:63]
[EA+8:EA+11] ← XS[64:95]
[EA+12:EA+15] ← XS[96:127]

Programming Note

stxvd2x, stxvw4x, stxvh8x, stxvb16x, and stxvx exhibit identical behavior in Big-Endian mode.

Example

stxvw4x vs1, r4, r5

Encoding

Binary Layout
18
0
S
6
RA
11
RB
16
0
21
0
22
0
23
0
24
0
25
0
26
0
27
0
28
0
29
0
30
0
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
 
Format XX1-form
Opcode 0x7C000718
Extension VSX
Registers Altered MSR

Operands

  • XS
    Source
  • RA
    Base
  • RB
    Index