macchwsu

Multiply Accumulate Cross Halfword Signed Unsigned

macchwsu RT, RA, RB

Mixed Sign Multiply Accumulate Cross Halfword with Saturation.

Details

Mixed-sign multiply-accumulate of the signed low halfword of RA by the unsigned high halfword of RB, added to RT with saturation. The signed 32-bit product is added to the low 32 bits of RT; if overflow occurs, the result is saturated to the signed 32-bit range. This is an embedded (e200/e500) instruction. The SAT bit in XER is set if saturation occurs.

Pseudocode Operation

prod ← EXTS(RA[48:63], 32) * EXTZ(RB[0:15], 32); sum ← EXTS(RT[32:63], 33) + EXTS(prod, 33); if (sum > 2^31 - 1) then { RT[32:63] ← 2^31 - 1; XER[SAT] ← 1 } else if (sum < -2^31) then { RT[32:63] ← -2^31; XER[SAT] ← 1 } else { RT[32:63] ← sum[0:31] }

Example

macchwsu r3, r4, r5

Encoding

Binary Layout
4
0
RT
6
RA
11
RB
16
204
21
0
31
 
Format XO-form
Opcode 0x10000198
Extension Embedded

Operands

  • RT
    Acc/Dest
  • RA
    Src A
  • RB
    Src B