vupkhpx

Vector Unpack High Pixel

vupkhpx vD, vB

Unpacks high 4 pixels to 4 words.

Encoding

Binary Layout

4

0:5

vD

6:10

0

11:15

vB

16:20

846

21:31

 

Format VX-form

Opcode 0x1000034E

Extension VMX (AltiVec)

Operands

• vD
  Target
• vB
  Source

Example

vupkhpx vd, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Unpacks the four high-order pixel values (each 8 bits) from vB into four 32-bit word elements in vD, expanding each pixel into a word with implicit format expansion. This VMX/AltiVec instruction is commonly used in graphics processing and does not affect status registers.

Operation

for i in 0 to 3:
  pixel ← vB[8*(i+4):8*(i+4)+7]
  vD[32*i:32*i+31] ← ExpandPixel(pixel)

Programming Note

The vupkhpx instruction is used to unpack the high halfwords of a vector register into bytes, sign-extending the most significant bit and zero-extending the remaining bits. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, a Vector_Unavailable exception will be raised. This operation is useful for processing pixel data where each pixel requires byte-level manipulation.