vstribr

Vector String Isolate Byte Right

vstribr VRT,VRB

Isolates the rightmost non-zero byte in a vector string and shifts it to the left.

Encoding

Binary Layout

0:5

VRT

6:10

VRB

11:15

16:20

21:31

Format VX-form

Opcode 0x1001000D

Extension VMX (AltiVec)

Operands

vD
Target
vB
Source
VRT
Target Vector Register
VRB
Source Vector Register

Example

vstribr v1, v3

Registers Altered

CR6 (if Rc=1)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Isolates the rightmost non-zero byte in each 16-byte element of the source vector and shifts it to the leftmost position of the corresponding result element; all other bytes in the result are zeroed. When Rc=1, the instruction updates CR6 based on whether a zero vector was produced.

Operation

for i in 0 to 15:
  byte_value ← VRB[i*8:(i+1)*8]
  if byte_value ≠ 0 then
    VRT[i*8:(i+1)*8] ← byte_value
  else
    VRT[i*8:(i+1)*8] ← 0
if Rc = 1 then CR6 ← record_zero_vector(VRT)

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.