vslo

Vector Shift Left by Octet

vslo vD, vA, vB

Shifts the contents of a vector register left by a specified number of bytes.

Encoding

Binary Layout

0:5

VRT

6:10

VRA

11:15

VRB

16:20

1036

21:31

Format VX-form

Opcode 0x1000040C

Extension VMX (AltiVec)

Operands

vD
Target
vA
Data
vB
Shift Count
VRT
Target Vector Register
VRA
Source Vector Register
VRB
Shift Count Vector Register
VZ
Target Vector Register
VX
Source Vector Register
VY
Shift Count Vector Register

Example

vslo vd, va, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of VSR[VRA+32] are shifted left by the number of bytes specified in bits 121:124 of VSR[VRB+32]. Bytes shifted out of byte 0 are lost, and zeros are supplied to the vacated bytes on the right. The result is placed into VSR[VRT+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
shb ← VSR[VRB+32].bit[121:124] << 3
VSR[VRT+32] ← VSR[VRA+32] << shb

Programming Note

A pair of these instructions, specifying the same shift count register, can be used to shift the contents of a VSR left or right by the number of bits (0-127) specified in the shift count register.