vpopcntw

Vector Population Count Word

vpopcntw vD, vB

Counts the number of bits set to 1 in each word element of a vector register.

Encoding

Binary Layout

4

0:5

vD

6:10

0

11:15

vB

16:20

1923

21:31

 

Format VX-form

Opcode 0x10000783

Extension VMX (AltiVec)

Operands

• vD
  Target
• vB
  Source
• VRT
  Target Vector Register
• VRB
  Source Vector Register

Example

vpopcntw vd, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vpopcntw, the number of bits set to 1 in each word element of VSR[VRB+32] is counted and placed into the corresponding word element of VSR[VRT+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 3
    n ←0
    do j = 0 to 31
        n ←n + VSR[VRB+32].word[i].bit[j]
    end
    VSR[VRT+32].word[i] ←n
end

Programming Note

This instruction counts the number of set bits (1s) in each 32-bit word of the source vector and stores the result in the destination vector. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. This instruction operates on 128-bit vectors, processing four 32-bit words per operation.