vperm

Vector Permute

vperm vD, vA, vB, vC

The signature AltiVec instruction. Constructs a new vector by selecting bytes from two source vectors based on a permute control vector.

Details

Vector Permute constructs a new 128-bit vector in VRT by selecting bytes from two source vectors (VRA and VRB) using a permute control vector VRC. Bytes 0–15 of the result come from VRA, bytes 16–31 from VRB; the low 5 bits of each byte in VRC index into the 32-byte concatenated source. This is the signature VMX/AltiVec instruction and requires the Vector facility.

Pseudocode Operation

for i ← 0 to 15
  control ← VRC[8×i : 8×i+4]
  if control < 16 then
    VRT[8×i : 8×i+7] ← VRA[8×control : 8×control+7]
  else
    VRT[8×i : 8×i+7] ← VRB[8×(control-16) : 8×(control-16)+7]

Programming Note

See the Programming Notes with the Load Vector for Shift Left and Load Vector for Shift Right instructions on page 266 for examples of uses of vperm.

Example

vperm v1, v2, v3, v4

// Arbitrary byte shuffle/merge.

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
vC
21
43
 
Format VA-form
Opcode 0x1000002B
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Source 1 (Bytes 0-15)
  • vB
    Source 2 (Bytes 16-31)
  • vC
    Control Vector
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register
  • VRC
    Permute Control Vector Register