vmrgow

Vector Merge Odd Word

vmrgow vD, vA, vB

Merges odd words from two vectors.

Details

Merges the odd-indexed words (words 1 and 3) from vector registers vA and vB into vD. This instruction interleaves odd-positioned word elements: vD[0] ← vA[1], vD[1] ← vB[1], vD[2] ← vA[3], vD[3] ← vB[3]. No condition flags are affected.

Pseudocode Operation

vD[0:31] ← vA[32:63]
vD[32:63] ← vB[32:63]
vD[64:95] ← vA[96:127]
vD[96:127] ← vB[96:127]

Programming Note

The vmrgow instruction is used to merge odd-numbered words from two source vectors into a destination vector. Ensure that the Vector Facility (VEC) bit in the Machine State Register (MSR) is set; otherwise, a Vector_Unavailable exception will be raised. This instruction operates on 128-bit vectors and requires proper alignment of the source and destination registers.

Example

vmrgow vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
1676
21
 
Format VX-form
Opcode 0x1000068C
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B