macchwu

Multiply Accumulate Cross Halfword Unsigned

macchwu RT, RA, RB

Unsigned Multiply Accumulate Cross Halfword.

Details

Unsigned multiply-accumulate of the low halfword of RA by the high halfword of RB, added to RT. The unsigned 32-bit product is added to the low 32 bits of RT, with wraparound on overflow. This is an embedded (e200/e500) instruction. No condition registers or XER fields are affected.

Pseudocode Operation

prod ← EXTZ(RA[48:63], 32) * EXTZ(RB[0:15], 32); RT[32:63] ← (RT[32:63] + prod[0:31]) mod 2^32

Example

macchwu r3, r4, r5

Encoding

Binary Layout
4
0
RT
6
RA
11
RB
16
12
21
0
31
 
Format XO-form
Opcode 0x10000118
Extension Embedded

Operands

  • RT
    Acc/Dest
  • RA
    Src A
  • RB
    Src B