fdiv.

Floating Point Divide Record

fdiv. FC,FA,FB

Divides the contents of two floating-point registers and updates the condition register.

Details

For fdiv., the quotient of the contents of register FA and FB is placed into register FC.

Pseudocode Operation

if 'fdiv.' then
    FC <- (FA) / (FB)

Programming Note

The fdiv. instruction performs a floating-point division, storing the result in register FC. Ensure that registers FA and FB are properly initialized to avoid undefined behavior. This operation may raise exceptions if FB is zero or if there are overflow/underflow conditions; check FPSCR for exception flags after execution.

Example

fdiv. fc, fa, fb

Encoding

Binary Layout
18
0
LI
6
AA
30
LK
31
 
Format XO-form
Opcode 0xFC000025
Extension Floating-Point
Registers Altered CR0, FPSCR

Operands

  • FC
    Target Floating Point Register
  • FA
    Source Floating Point Register
  • FB
    Source Floating Point Register