xxbrd

VSX Vector Byte-Reverse Doubleword

xxbrd XT,XB

Reverses the bytes of each doubleword element in a vector register.

Encoding

Binary Layout

Format XX-form

Opcode 0xF017076C

Extension VSX

Operands

XT
Target Vector-Specific Register
XB
Source Vector-Specific Register

Example

xxbrd vs1, vs3

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of byte 5 of doubleword element i of VSR[XB] are placed into byte 2 of doubleword element i of VSR[XT]. Similarly, the contents of byte 4 of doubleword element i of VSR[XB] are placed into byte 3 of doubleword element i of VSR[XT], and so on.

Operation

if MSR.VSX=0 then VSX_Unavailable()
do i = 0 to 1
    vsrc ← VSR[32×BX+B].dword[i]
    do j = 0 to 7
        VSR[32×TX+T].dword[i].byte[j] ← vsrc.byte[7-j]
    end
end

Programming Note

The xxbrd instruction reverses the bytes within each doubleword of a VSX vector. Ensure that the VSX facility is enabled in the MSR register to avoid an exception. This instruction operates on 128-bit vectors, processing two 64-bit doublewords. There are no specific alignment requirements for the source or target registers.