xxlorc

VSX Vector Logical OR with Complement

xxlorc XT, XA, XB

vD = vA | ~vB

Encoding

Binary Layout

60

0:5

XT

6:10

XA

11:15

XB

16:20

452

21:31

 

Format XX3-form

Opcode 0xF0000550

Extension VSX

Operands

• XT
  Target
• XA
  Src A
• XB
  Src B

Example

xxlorc vs1, vs2, vs3

Registers Altered

MSR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Performs a bitwise logical OR operation between XA and the bitwise complement of XB, storing the result in XT. The operation is XT ← XA | ~XB on all 128 bits. No condition register or status field modifications occur.

Operation

XT ← XA | ~XB

Programming Note

The xxlorc instruction is useful for performing bitwise operations on VSX registers. Ensure that the VSX facility is enabled by checking and setting the MSR.VSX bit; otherwise, a VSX_Unavailable exception will occur. The operation is performed on 128-bit vectors, so ensure proper alignment of the data in the registers to avoid unexpected results.