VSX Instructions
290 PowerISA instructions in this extension - showing 100 per page, page 1 of 3 - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| lxsd | lxsd VRT,disp(RA) | DS-form | Loads a doubleword from memory into a VSX scalar register. |
| lxsdx | lxsdx XT,RA,RB | X-form | Loads a doubleword from memory into a VSX scalar register. |
| lxsibzx | lxsibzx XT,RA,RB | X-form | Loads a byte from memory and places it into the specified VSX register, zeroing the upper half. |
| lxsiwax | lxsiwax XT, RA, RB | XX1-form | Loads a word from memory into the left-most doubleword element of a VSR, sign-extends it to 64 bits, and aligns it. |
| lxsiwzx | lxsiwzx XT, RA, RB | XX1-form | Loads a word from memory and places it into the specified VSX register, zero-extending it. |
| lxssp | lxssp RT,RA,RB | XX2-form | Accesses a floating-point operand in single-precision format from storage, converts it to double-precision format, and loads it into a VSR. |
| lxsspx | lxsspx XT,RA,RB | X-form | Loads a single-precision floating-point value from memory and converts it to double-precision format in a VSX register. |
| lxv | lxv XT, DQ(RA) | DQ-form | Loads a 128-bit vector from memory (VSX aligned offset). |
| lxvb16x | lxvb16x XT,RA,RB | X-form | Loads a vector of 16 byte elements from memory into a VSX register. |
| lxvd2x | lxvd2x XT, RA, RB | XX1-form | Loads a 128-bit vector from memory into a VSX register. Does NOT require 16-byte alignment (unlike lvx). |
| lxvdsx | lxvdsx XT, RA, RB | X-form | Loads a doubleword from memory and splats it into two elements of a VSX vector register. |
| lxvh8x | lxvh8x XT,RA,RB | X-form | Loads a vector of 8 halfwords from memory into a VSX register. |
| lxvkq | lxvkq XT,UIM | X-form | Loads a special value into a VSX vector register. |
| lxvl | lxvl XT, RA, RB | XX1-form | Loads N bytes into a vector, where N is specified in a GPR. |
| lxvll | lxvll XT,RA,RB | X-form | Loads a variable-length vector from memory into a VSX register, left-justifying the data. |
| lxvp | lxvp XT, DQ(RA) | DQ-form | Loads a double quadword from memory into two VSX registers. |
| lxvpx | lxvpx XTp,RA,RB | X-form | Loads a vector from memory into two VSR registers. |
| lxvrbx | lxvrbx XT,RA,RB | X-form | Loads a byte from memory into the rightmost byte of a VSX vector register. |
| lxvrdx | lxvrdx XT,RA,RB | X-form | Loads a doubleword from memory into the rightmost element of a VSX vector register. |
| lxvrhx | lxvrhx XT,RA,RB | X-form | Loads a halfword from memory into the rightmost element of a VSX vector register. |
| lxvrwx | lxvrwx XT,RA,RB | X-form | Loads a word from memory into the rightmost word of a VSX vector register. |
| lxvw4x | lxvw4x XT, RA, RB | XX1-form | Loads four words into a vector (unaligned). |
| lxvwsx | lxvwsx XT, RA, RB | XX1-form | Loads a 32-bit word and replicates it across the vector. |
| lxvx | lxvx XT,RA,RB | X-form | Loads a quadword from memory into a VSX register. |
| mfvsrd | mfvsrd RA, XS | XX1-form | Moves the contents of a doubleword element from a Vector-Scalar Register (VSR) to a General Purpose Register (GPR). |
| mfvsrld | mfvsrld RA, XS | XX1-form | Moves the lower doubleword of a vector register to a general-purpose register. |
| mfvsrwz | mfvsrwz RA, XS | XX1-form | Moves the contents of a word element from a vector-scalar register to a general-purpose register, zeroing the upper bits. |
| mtvsrd | mtvsrd XT, RA | XX1-form | Moves 64 bits from a GPR to a VSR. |
| mtvsrdd | mtvsrdd XT, RA, RB | X-form | Moves the contents of two general-purpose registers into a vector-scalar register (VSR) as doublewords. |
| mtvsrwa | mtvsrwa XT, RA | XX1-form | Moves the two's-complement integer in bits 32:63 of GPR[RA] to doubleword element 0 of VSR[XT], sign-extended to 64 bits. |
| mtvsrws | mtvsrws XT, RA | XX1-form | Moves a 32-bit word from a GPR and replicates it across the vector. |
| pmxvbf16ger2np | pmxvbf16ger2np AT,XA,XB,XMSK,YMSK,PMSK | MMIRR:XX3-form | Performs a masked vector operation with bfloat16 elements using negative multiplication and positive accumulation. |
| pmxvf16ger2np | pmxvf16ger2np AT,XA,XB,XMSK,YMSK,PMSK | MMIRR:XX3-form | Performs a masked vector operation with negative multiplication and positive accumulation. |
| pmxvf32gernp | pmxvf32gernp AT,XA,XB,XMSK,YMSK | MMIRR:XX3-form | Performs a masked vector operation with negative multiplication and positive accumulation. |
| pmxvf64gernp | pmxvf64gernp AT,XAp,XB,XMSK,YMSK | MMIRR:XX3-form | Performs a masked vector floating-point operation with negative multiplication and positive accumulation. |
| stxsd | stxsd VRS,disp(RA) | DS-form | Stores the contents of doubleword element 0 of VSR[XS] to memory. |
| stxsdx | stxsdx XS,RA,RB | X-form | Stores a doubleword from a VSX scalar register to memory. |
| stxsibx | stxsibx XS,RA,RB | X-form | Stores a byte from a VSX scalar register into memory at an address formed by adding two general-purpose registers. |
| stxsiwx | stxsiwx XS, RA, RB | XX1-form | Stores a single-precision floating-point value from a VSX register into memory, indexed by another register. |
| stxssp | stxssp VRS,disp(RA) | DS-form | Stores a single-precision floating-point value from a VSX register to memory. |
| stxsspx | stxsspx XS,RA,RB | X-form | Stores a single-precision floating-point value from a VSX register to memory. |
| stxv | stxv XS, DQ(RA) | DQ-form | Stores a 128-bit vector to memory (VSX aligned offset). |
| stxvb16x | stxvb16x XS,RA,RB | X-form | Stores a vector of 16 byte elements from VSR[XS] into Big-Endian storage using stxvb16x, retaining left-to-right element ordering. |
| stxvd2x | stxvd2x XS, RA, RB | XX1-form | Stores a 128-bit VSX register to memory. Does NOT require alignment. |
| stxvh8x | stxvh8x XS,RA,RB | X-form | Stores a vector of 8 halfword elements from VSR[X] into memory using indexed addressing. |
| stxvl | stxvl XS, RA, RB | XX1-form | Stores a specified number of bytes from a VSX vector register to memory. |
| stxvll | stxvll XS,RA,RB | X-form | Stores a left-justified vector from a VSX register to memory. |
| stxvp | stxvp XS, DQ(RA) | DQ-form | Stores a pair of VSX vector registers to memory. |
| stxvpx | stxvpx XSp,RA,RB | X-form | Stores a vector from two VSR registers into memory at the effective address. |
| stxvrbx | stxvrbx XS,RA,RB | X-form | Stores the rightmost byte of a VSX vector element to memory. |
| stxvrdx | stxvrdx VX,RA,RB | X-form | Stores the rightmost doubleword of a VSX vector register to memory. |
| stxvrhx | stxvrhx XS,RA,RB | X-form | Stores the rightmost halfword of a VSX vector element to memory. |
| stxvw4x | stxvw4x XS, RA, RB | XX1-form | Stores four words from a vector (unaligned). |
| stxvx | stxvx xW,r0,rPW | X-form | Stores a vector element from the VSX register file to memory. |
| xmsubasp | xmsubasp XT,XA,XB | XX3-form | Performs a multiply-subtract operation on single-precision floating-point values. |
| xsabsdp | xsabsdp XT, XB | XX2-form | Computes the absolute value of a double-precision floating-point number. |
| xsabsqp | xsabsqp vD, vB | X-form | Computes the absolute value of a quad-precision floating-point number. |
| xsadddp | xsadddp XT, XA, XB | XX3-form | Adds two double-precision floating-point values from vector scalar registers and stores the result in a target vector scalar register. |
| xsaddqp | xsaddqp vD, vA, vB | X-form | Adds two 128-bit Quad-Precision floating-point numbers held in VSX registers (pairs). |
| xsaddqpo | xsaddqpo vD, vA, vB | X-form | Used for Quad-Precision arithmetic on hardware that splits quads. |
| xsaddsp | xsaddsp XT, XA, XB | XX3-form | Adds the contents of two single-precision floating-point numbers and places the result in a double-precision format. |
| xscmpeqdp | xscmpeqdp XT,XA,XB | XX3-form | Compares two double-precision floating-point values and sets the target vector register based on equality. |
| xscmpeqqp | xscmpeqqp VRT,VRA,VRB | X-form | Compares two quad-precision floating-point values and sets the target vector register to all 1s if they are equal, otherwise all 0s. |
| xscmpexpdp | xscmpexpdp BF, XA, XB | XX3-form | Compares the exponents of two double-precision floating-point values in VSX registers and updates the condition register. |
| xscmpexpqp | xscmpexpqp BF, vA, vB | X-form | Compares the exponents of two quad-precision floating-point values and updates the condition register. |
| xscmpgedp | xscmpgedp XT,XA,XB | XX3-form | Compares two double-precision floating-point values and sets the target vector register based on the comparison result. |
| xscmpgeqp | xscmpgeqp VRT,VRA,VRB | X-form | Compares two quad-precision floating-point values and sets the target register based on the comparison. |
| xscmpgtdp | xscmpgtdp XT,XA,XB | XX3-form | Compares two double-precision floating-point values and sets the target vector register based on the comparison. |
| xscmpgtqp | xscmpgtqp VRT,VRA,VRB | X-form | Compares two quad-precision floating-point values and sets the target vector register to all 1s if the first value is greater than the second, otherwise all 0s. |
| xscmpodp | xscmpodp BF, XA, XB | XX3-form | Compares two double-precision floating-point values and sets the condition register based on the comparison. |
| xscmpopoqp | xscmpopoqp BF, vA, vB | X-form | Compares Quad floats (Signaling on NaN). |
| xscmpoqp | xscmpoqp BF,VRA,VRB | X-form | Compares two quad-precision floating-point values and updates the condition register. |
| xscmpudp | xscmpudp BF, XA, XB | XX3-form | Compares two double-precision floating-point values and sets the condition register based on the comparison. |
| xscmpuqp | xscmpuqp BF, vA, vB | X-form | Compares two quad-precision floating-point values and updates the condition register. |
| xscpsgndp | xscpsgndp XT,XA,XB | X-form | Copies the sign of a double-precision floating-point value from one register to another. |
| xscpsgnqp | xscpsgnqp vD, vA, vB | X-form | Copies sign from B to A (128-bit). |
| xscvdphp | xscvdphp XT, XB | XX2-form | Converts a double-precision floating-point value to a half-precision floating-point value with rounding. |
| xscvdpqp | xscvdpqp vD, vB | X-form | Converts a double-precision floating-point value to a quad-precision floating-point value. |
| xscvdpsp | xscvdpsp XT, XB | XX2-form | Converts a double-precision floating-point value in VSR[XB] to single-precision format and places the result into VSR[XT]. |
| xscvdpspn | xscvdpspn XT,XB | XX2-form | Converts a scalar single-precision floating-point value to vector single-precision format without raising exceptions for inexact results. |
| xscvdpsxds | xscvdpsxds XT, XB | XX2-form | Converts a double-precision floating-point value to a signed doubleword integer using round towards zero. |
| xscvdpsxw | xscvdpsxw XT,XB | X-form | Converts a double-precision floating-point number to a signed word, rounding towards zero. |
| xscvdpsxws | xscvdpsxws XT,XB | X-form | Converts a double-precision floating-point value to a signed word format using round towards zero. |
| xscvdpuxds | xscvdpuxds XT, XB | XX2-form | Converts a double-precision floating-point value to an unsigned 64-bit integer using round towards zero. |
| xscvdpuxws | xscvdpuxws XT,XB | XX2-form | Converts a double-precision floating-point value to an unsigned 32-bit integer, rounding towards zero. |
| xscvhpdp | xscvhpdp XT, XB | XX2-form | Converts a half-precision floating-point value to a double-precision floating-point value. |
| xscvqpdp | xscvqpdp vD, vB | X-form | Converts a quad-precision floating-point value to a double-precision floating-point value with round-to-even rounding. |
| xscvqpsdz | xscvqpsdz VRT,VRB | X-form | Converts a quad-precision floating-point value to a signed doubleword integer, rounding towards zero. |
| xscvqpsqz | xscvqpsqz VRT,VRB | X-form | Converts a quad-precision floating-point value to a signed quadword integer, rounding towards zero. |
| xscvqpswz | xscvqpswz VRT,VRB | X-form | Converts a quad-precision floating-point value to a signed word format. |
| xscvqpudz | xscvqpudz VRT,VRB | X-form | Converts a quad-precision floating-point value to an unsigned doubleword integer, rounding towards zero. |
| xscvqpuqz | xscvqpuqz VRT,VRB | X-form | Converts a quad-precision floating-point value to an unsigned quadword integer, rounding towards zero. |
| xscvqpuwz | xscvqpuwz VRT,VRB | X-form | Converts a quad-precision floating-point value to an unsigned word format. |
| xscvsdqp | xscvsdqp vD, vB | X-form | Converts a signed doubleword integer from VSR[VRB+32] to quad-precision floating-point in VSR[VRT+32]. |
| xscvspdp | xscvspdp XT, XB | XX2-form | Converts a single-precision floating-point value in VSR[XB] to double-precision format and places the result into VSR[XT]. |
| xscvsqqp | xscvsqqp VRT,VRB | X-form | Converts a signed quadword integer to a quad-precision floating-point number and rounds it. |
| xscvsxddp | xscvsxddp XT,RB | X-form | Converts a signed doubleword integer from VSX register XB to a double-precision floating-point number in VSX register XT, rounding according to the FPSCR.RN setting. |
| xscvsxdsp | xscvsxdsp XT,XB | XX2-form | Converts a signed doubleword integer in a VSX register to a single-precision floating-point number and rounds it. |
| xscvudqp | xscvudqp vD, vB | X-form | Converts 64-bit Unsigned Integer to 128-bit Float. |
| xsdivdp | xsdivdp XT,XA,XB | XX3-form | Divides the double-precision floating-point value in VSR[XA] by the double-precision floating-point value in VSR[XB]. |