lxvh8x

Load VSX Vector Halfword*8 Indexed

lxvh8x XT,RA,RB

Loads a vector of 8 halfwords from memory into a VSX register.

Details

The lxvh8x instruction loads a vector of 8 halfwords from memory into the VSX register specified by XT. The effective address (EA) is calculated as the sum of GPR[RA] and GPR[RB]. If RA is zero, EA is set to GPR[RB]. The data is loaded in little-endian byte order.

Pseudocode Operation

if TX=0 & MSR.VSX=0 then VSX_Unavailable()
if TX=1 & MSR.VEC=0 then Vector_Unavailable()
EA ←((RA=0) ? 0 : GPR[RA]) + GPR[RB]
do i = 0 to 7
    VSR[32×TX+T].hword[i] ←MEM(EA+2×i, 2)
end

Programming Note

lxvh8x, lxvd2x, lxvw4x, lxvb16x, and lxvx exhibit identical behavior in Big-Endian mode.

Example

lxvh8x vs1, r4, r5

Encoding

Binary Layout
0
0
T
6
RA
11
RB
16
TX
21
 
Format X-form
Opcode 0x7C000658
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target VSX Register
  • RA
    Source General Purpose Register (Base Address)
  • RB
    Source General Purpose Register (Index)