lswx

Load String Word Indexed

lswx RT, RA, RB

Loads N bytes from memory (N in XER).

Details

The lswx instruction loads a string of bytes from memory into general-purpose registers (GPRs). The effective address is calculated by adding the contents of register RA and RB. The number of bytes to load is determined by bits 57-63 of the XER register. Data are loaded into the low-order four bytes of each GPR, with the high-order four bytes set to zero. If the last register is only partially filled, the unfilled low-order byte(s) are set to zero.

Pseudocode Operation

if RA = 0 then b ←0
else           b ←(RA)
EA ←b + (RB)
n ←XER57:63
r ←RT - 1
i ←32
do while n > 0
   if i = 32 then
      r ←r + 1 (mod 32)
      GPR(r) ←0
   GPR(r)i:i+7 ←MEM(EA, 1)
   i ←i + 8
   if i = 64 then i ←32
   EA ←EA + 1
   n ←n - 1
if n=0, the contents of register RT are undefined.

Programming Note

String instructions are not pipelined on most implementations and can be very slow for large counts. Consider using byte loops or vector instructions for performance-critical paths. NB: these instructions are optional in Power ISA 3.0+ and may trap on some implementations.

Example

lswx r3, r4, r5

Encoding

Binary Layout
31
0
RT
6
RA
11
RB
16
533
21
/
31
 
Format X-form
Opcode 0x7C000425
Extension Base
Registers Altered XER

Operands

  • RT
    Start Reg
  • RA
    Base
  • RB
    Index