xvcmpeqsp

VSX Vector Compare Equal Single-Precision

xvcmpeqsp XT,XA,XB
xvcmpeqsp. XT,XA,XB

Compares each single-precision floating-point element of two VSX registers and sets the corresponding element in the target register to all 1s if they are equal, otherwise all 0s.

Details

For xvcmpeqsp, each integer value i from 0 to 3, the single-precision floating-point operand in word element i of VSR[XA] is compared to the single-precision floating-point operand in word element i of VSR[XB]. The contents of word element i of VSR[XT] are set to all 1s if they are equal, and all 0s otherwise.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
ex_flag ←0b0
all_false ←0b1
all_true ←0b1
do i = 0 to 3
    reset_xflags()
    src1 ←bfp_CONVERT_FROM_BFP32(VSR[32×AX+A].word[i])
    src2 ←bfp_CONVERT_FROM_BFP32(VSR[32×BX+B].word[i])
    vxsnan_flag ←IsSNaN(src1) | IsSNaN(src2)
    if src1 = src2 then do
        all_false ←0b0
    end
    else do
        vresult.word[i] ←0x0000_0000
        all_true ←0b0
    end
    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag)
end
if Rc=1 then do
    if vex_flag=0 then
        CR.field[6] ←all_true || 0b0 || all_false || 0b0
    else
        CR.field[6] ←0bUUUU
end

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Example

xvcmpeqsp vs1, vs2, vs3

Encoding

Binary Layout
T
6
A
11
B
16
Rc
21
AX
29
BX
30
TX
31
 
Format XX3-form
Opcode 0xF0000043
Extension VSX
Registers Altered CR, FPSCR

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B