xvnmaddmsp

VSX Vector Negative Multiply-Add Type-M Single-Precision

N/A

Performs a vector single-precision floating-point negative multiply-add operation (Type-M), computing the negation of (XB * XT + XA) for each single-precision element.

Details

Performs a VSX vector single-precision floating-point negative multiply-add operation (Type-M form), computing -(XA + XB × XT) for each single-precision element. This instruction is part of the VSX extension and operates on four single-precision values per 128-bit vector.

Pseudocode Operation

for i ∈ [0,3]:
  XA[32*i:32*i+31] ← -(XA[32*i:32*i+31] + (XB[32*i:32*i+31] × XT[32*i:32*i+31]))

Programming Note

This instruction is useful for performing complex vector operations involving single-precision floating-point arithmetic. Ensure that all input and output vectors are properly aligned to avoid performance penalties or exceptions. The operation is performed at the user privilege level, so no special privileges are required. Be cautious of potential overflow or underflow conditions during multiplication and addition steps.

Example

xvnmaddmsp vs1, vs2, vs3

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
1608
21
 
Format XX3-form
Opcode 0xF0000648
Extension VSX

Operands

  • XT
    Target VSX vector register that serves as both the third multiplicand and destination for negated results.
  • XA
    Source VSX vector register providing the first operand (addend).
  • XB
    Source VSX vector register providing the first multiplier operand.