lhax
Load Halfword Algebraic Indexed X-form
lhax RT,RA,RB
Loads a halfword from memory into a register and extends it to a full word, with indexed addressing.
Encoding
Binary Layout
18
0:5
LI
6:29
AA
30
LK
31
Operands
-
RT
Target General Purpose Register -
RA
Base General Purpose Register -
RB
Index General Purpose Register
Example
lhax r3, r4, r5
Related
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
The effective address (EA) is the sum of the contents of registers RA and RB. The halfword in storage addressed by EA is loaded into RT48:63, and RT0:47 are filled with a copy of bit 0 of the loaded halfword.
Operation
if RA = 0 then
b ← 0
else
b ← (RA)
EA ← b + (RB)
RT ← EXTS(MEM(EA, 2))
Programming Note
The lhax instruction is commonly used for loading a signed halfword from memory into the upper half of a register. Ensure that RA and RB are correctly set to avoid incorrect effective address calculation. This instruction requires the operands to be properly aligned; accessing unaligned data can lead to exceptions. The result is sign-extended, so be cautious when interpreting the value in RT.