std

Store Doubleword

std RS, DS(RA)

Stores a 64-bit doubleword to memory.

Encoding

Binary Layout

62

0:5

RS

6:10

RA

11:15

DS

16:29

00

30:31

 

Format DS-form

Opcode 0xF8000000

Extension Base

Operands

• RS
  Source Register
• DS
  Displacement (Multiple of 4)
• RA
  Base Register

Example

std r3, 16(r4)

// Store 64-bit value.

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Store the 64-bit doubleword in RS to memory at the effective address formed by adding the displacement DS (a 14-bit field shifted left 2 positions, thus a multiple of 4) to RA, or to the displacement alone if RA is 0. This is a Base category, 64-bit mode instruction with no status field updates.

Operation

EA ← EXTS(DS || 00, 16) + (RA | 0)
MEM(EA, 8) ← RS[0:63]

Programming Note

The std instruction stores a doubleword from a source register into memory. Ensure that the destination address is properly aligned to avoid performance penalties or exceptions. This instruction operates at user privilege level and will raise an exception if the EA is out of bounds.