lwsync
Lightweight Synchronize (Pseudo)
lwsync
Orders loads with loads, stores with stores, and loads with stores. Does NOT order stores with loads. (Encoded as sync 1).
Encoding
Binary Layout
31
0:5
0
6:7
1
8:10
0
11:20
598
21:30
/
31
Operands
Related
Across architectures
Memory Barrier / Fence : how x86, ARM, RISC-V, and PowerISA each do this.
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Lightweight Sync. Extended mnemonic for SYNC (sync 1). Provides a lightweight memory synchronization barrier for ordering loads and stores without full heavyweight sync semantics.
Operation
MemoryBarrier(Light)Programming Note
Lightweight sync. Orders loads and stores before the barrier against loads and stores after it, but does not guarantee store-to-load ordering. Sufficient for producer-consumer patterns without data-dependent stores.