lwax
Load Word Algebraic Indexed X-form
lwax RT,RA,RB
Loads a word from memory into a register using an indexed address.
Encoding
Binary Layout
0
0:5
RT
6:10
RA
11:15
DS
16:20
2
21:31
Operands
-
RT
Target General Purpose Register -
RA
Source General Purpose Register (base address) -
RB
Source General Purpose Register (offset)
Example
lwax r3, r4, r5
Related
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Loads a 32-bit signed word from memory at address RA+RB, sign-extends it to 64 bits, and stores the result in GPR RT. This instruction is part of the Base category and does not update condition registers or the XER.
Operation
EA ← (RA = 0 ? 0 : GPR(RA)) + GPR(RB)
GPR(RT) ← EXTS([EA])
Programming Note
The lwax instruction is commonly used for loading a word from memory into a register using an indexed addressing mode. Ensure that the base address in RA is properly aligned to avoid misaligned access exceptions. This instruction operates at user privilege level and can raise an exception if the EA is out of bounds or if there are memory protection violations.