lbzux

Load Byte and Zero with Update Indexed X-form

lbzux RT,RA,RB

Loads a byte from memory into a register, zero-extends it to 32 bits, and updates the base address.

Encoding

Binary Layout

31

0:5

RT

6:10

RA

11:15

RB

16:20

119

21:30

/

31

 

Format X-form

Opcode 0x7C0000EE

Extension Base

Operands

• RT
  Target General Purpose Register
• RA
  Base Address General Purpose Register
• RB
  Index General Purpose Register

Example

lbzux r3, r4, r5

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The sum of the contents of general-purpose register RA and the contents of general-purpose register RB is the effective address (EA). The byte in memory addressed by EA is loaded into the low-order 8 bits of general-purpose register RT, and the remaining bits of RT are cleared to 0. The effective address EA is placed into register RA. If RA = 0 or RA = RT, the instruction form is invalid.

Operation

EA ← (RA) + (RB)
RT ← 0x000000 || MEM(EA, 1)
RA ← EA

Programming Note

The base register (RA) is updated with the effective address after the memory access. RA must not be 0 and must differ from the destination register; violating this constraint produces undefined results.