sthbrx

Store Halfword Byte-Reverse Indexed

sthbrx RS, RA, RB

Swaps bytes and stores a halfword.

Encoding

Binary Layout

31

0:5

RS

6:10

RA

11:15

RB

16:20

918

21:30

/

31

 

Format X-form

Opcode 0x7C00072C

Extension Base

Operands

• RS
  Source
• RA
  Base
• RB
  Index

Example

sthbrx r3, r4, r5

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Byte-reverses the low 16 bits of RS and stores the result as a halfword in memory at address (RA|0) + RB. No status flags are affected. This is used to write halfword data in reversed byte order to memory.

Operation

EA ← (RA|0) + RB
[EA] ← byte_reverse_16(RS[48:63])

Programming Note

The sthbrx instruction is useful for storing a halfword in memory with byte-reversed order. Ensure that the base address register (RA) and index register (RB) are correctly set to avoid incorrect memory addresses. This instruction operates at user privilege level and will raise an exception if the effective address is out of bounds or if there is a protection fault.