stswi
Store String Word Immediate
stswi RT, RA, NB
Stores a string of words from general-purpose registers to memory, starting at the address in RA and using an immediate byte count.
Encoding
Binary Layout
31
0:5
RT
6:10
RA
11:15
NB
16:20
725
21:30
/
31
Operands
-
RT
Start Register -
RA
Base -
NB
Byte Count -
RS
Source General Purpose Register
Example
stswi r3, r4, 4
Related
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Stores NB bytes from a sequence of GPRs beginning at RS to memory starting at address RA, extracting bytes left-to-right and wrapping from R31 back to R0 if necessary. This Base ISA instruction does not affect condition registers and provides a byte-oriented string store capability.
Operation
EA ← RA
reg ← RS
byte_index ← 0
for i ← 0 to (NB - 1) do
MEM[EA+i : EA+i+7] ← GPRC[reg][(32 - 8*(byte_index+1)) : (31 - 8*byte_index)]
byte_index ← byte_index + 1
if byte_index = 4 then
byte_index ← 0
reg ← (reg + 1) mod 32
end if
end for
Programming Note
This instruction is not supported in Little-Endian mode. If it is executed in Little-Endian mode and NB > 0, the system alignment error handler is invoked.