stdcx.

Store Doubleword Conditional Indexed

stdcx. RS, RA, RB

Stores a doubleword from a register to memory if the reservation is valid and matches the address used for the reservation.

Encoding

Binary Layout

31

0:5

RS

6:10

RA

11:15

RB

16:20

214

21:30

1

31

 

Format X-form

Opcode 0x7C0001AD

Extension Base

Operands

• RS
  Source
• RA
  Base
• RB
  Index

Example

stdcx. r3, r4, r5

Registers Altered

CR0, XER

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The stdcx. instruction stores the contents of register RS into memory at the effective address (EA) calculated as the sum of registers RA and RB, but only if there is a valid reservation that matches this EA and has a length of 8 bytes. The reservation is cleared after the operation.

Operation

if RA = 0 then
    b ← 0
else
    b ← (RA)
EA ← b + (RB)
if RESERVE then
    if RESERVE_LENGTH = 8 &
       RESERVE_ADDR = real_addr(EA) then
        MEM(EA, 8) ← (RS)
        undefined_case ← 0
        store_performed ← 1
    else
        z ← smallest real page size supported by implementation
        if RESERVE_ADDR ÷ z = real_addr(EA) ÷ z then
          undefined_case ← 1
        else
          undefined_case ← 0
          store_performed ← 0
else
    undefined_case ← 0
    store_performed ← 0
if undefined_case then
    u1 ← undefined 1-bit value
    if u1 then
      MEM(EA, 8) ← (RS)
    u2 ← undefined 1-bit value
    CR0 ← 0b00 || u2 || XERSO
else
    CR0 ← 0b00 || store_performed || XERSO
RESERVE ← 0

Programming Note

Succeeds only if a valid reservation exists on the target address. Sets CR0[EQ] to 1 on success, 0 on failure. Must always be used in a retry loop that re-executes the load-reserve instruction on failure.