stvxl

Store Vector Indexed Last

stvxl VS,RA,RB

Stores a vector element to memory, with the last element being stored if the index is out of bounds.

Details

The stvxl (Store Vector Indexed Last) instruction stores the contents of a vector register VS to memory at the effective address formed by the sum of the contents of general-purpose register RA (or 0 if RA=0) and general-purpose register RB, with the address aligned to a 16-byte boundary. This instruction is a hint to the processor that the referenced cache line is no longer needed (the 'last' touch hint), and may allow the hardware to avoid a cache line allocation on the store. The lower-order bits of the effective address are ignored for the purpose of the store operation.

Pseudocode Operation

Not available in specification

Programming Note

Use stvxl when storing vector data with a 'last touch' hint, potentially reducing cache line allocations. Ensure RA and RB are correctly set to form the aligned 16-byte address. This instruction is useful for optimizing memory usage in performance-critical sections.

Example

stvxl vs1, r4, r5

Encoding

Binary Layout
31
0
VS
6
RA
11
RB
16
487
21
/
31
 
Format X-form
Opcode 0x7C0003CE
Extension Base

Operands

  • VS
    Vector Register
  • RA
    Base Address General Purpose Register
  • RB
    Index General Purpose Register