tlbivax

TLB Invalidate Virtual Address Indexed

tlbivax RA, RB

Invalidates a TLB entry by virtual address.

Encoding

Binary Layout

31

0:5

/

6:10

RA

11:15

RB

16:20

786

21:30

/

31

 

Format X-form

Opcode 0x7C000622

Extension Embedded

Operands

• RA
  Base
• RB
  Index

Example

tlbivax r4, r5

Related

More in Embedded

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Invalidates a TLB entry matching the virtual address formed by RA and RB. This instruction is privileged and causes any TLB entry with a matching virtual address to be marked invalid. The exact behavior depends on the MMU implementation and may invalidate one or multiple entries.

Operation

EA ← (RA) + (RB)
for each TLB entry matching EA do
  TLB[entry].V ← 0
end for