vsbox

Vector S-Box

vsbox vD, vA

Performs the SubBytes operation (S-Box lookup) on a vector.

Encoding

Binary Layout

4

0:5

vD

6:10

0

11:15

vA

16:20

1480

21:31

 

Format VX-form

Opcode 0x100005C8

Extension Vector Crypto

Operands

• vD
  Target
• vA
  Source
• VRT
  Target Vector Register
• VRA
  Source Vector Register

Example

vsbox vd, va

Registers Altered

MSR

Related

More in Vector Crypto

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Performs the SubBytes operation (S-Box lookup) on all 16 bytes of a 128-bit vector, applying the AES S-box transformation to each byte independently. This instruction is part of the Vector Crypto extension and is used during AES encryption and decryption. No status flags are affected.

Operation

for i = 0 to 15 do vD[8*i:8*i+7] ← AES_SBOX[vA[8*i:8*i+7]]

Programming Note

The vsbox instruction applies the AES SubBytes transformation to a vector register, requiring the Vector Facility to be enabled (MSR.VEC=1). Ensure that the input vector is correctly aligned and that the destination register is properly set to avoid data corruption. This instruction operates at user privilege level but will raise an exception if the Vector Facility is not available.