xvf64ger

VSX Vector Float64 GER (Rank-1 Update)

xvf64ger AT, XA, XB

Performs a vector floating-point general element-wise reduction on 64-bit elements.

Details

The xvf64ger instruction performs a rank-1 update on a 4x4 matrix accumulator using two input vectors. It multiplies corresponding elements of the vectors and accumulates the results into the matrix.

Pseudocode Operation

for i=0 to 3, j=0 to 3:
    ACC[AT][i][j] = fmuls(X[i],Y[j])

Programming Note

The xvf64ger instruction is commonly used for performing matrix operations in scientific computing and linear algebra. Ensure that the input vectors X and Y are properly aligned to avoid performance penalties. This instruction operates at user privilege level, but improper use can lead to undefined behavior if the accumulator register is not correctly initialized.

Example

xvf64ger acc0, vs2, vs3

Encoding

Binary Layout
0
0
6
6
9
9
11
11
16
16
21
21
29
29
30
30
31
31
 
Format XX3-form
Opcode 0xF000003B
Extension MMA

Operands

  • AT
    Accumulator
  • XA
    Src A (FP64)
  • XB
    Src B (FP64)
  • XAp
    Source Vector Register