xsrqpxp
VSX Scalar Round Quad-Precision to Extended-Precision
Rounds a quad-precision floating-point value to extended-precision.
Details
The xsrqpxp instruction rounds the quad-precision floating-point value in VSR[VRB+32] to extended-precision format and places the result into VSR[VRT+32]. The rounding mode is specified by RMC.
Pseudocode Operation
if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
if R=0 then
do
if RMC=0b00 then rmode ←0b100
if RMC=0b11 then do
if FPSCR.RN=0b00 then rmode ←0b000
if FPSCR.RN=0b01 then rmode ←0b001
if FPSCR.RN=0b10 then rmode ←0b010
if FPSCR.RN=0b11 then rmode ←0b011
end
do
else do // R=1
if RMC=0b00 then rmode ←0b000
if RMC=0b01 then rmode ←0b001
if RMC=0b10 then rmode ←0b010
if RMC=0b11 then rmode ←0b011
end
do
src ← bfp_CONVERT_FROM_BFP128(VSR[VRB+32])
rnd ← bfp_ROUND_TO_BFP80(rmode, src)
result ← bfp128_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if xx_flag=1 then SetFX(FPSCR.XX)
vex_flag ← FPSCR.VE & vxsnan_flag
if vex_flag=0 then do
VSR[VRT+32] ← result
FPSCR.FPRF ← fprf_CLASS_BFP128(result)
end
do
FPSCR.FR ← (vxsnan_flag=0) & inc_flag
FPSCR.FI ← (vxsnan_flag=0) & xx_flag
Programming Note
The xsrqpxp instruction is used to round a quad-precision floating-point number to extended-precision format. Ensure that the VSX facility is enabled by checking MSR.VSX before using this instruction. The rounding mode is determined by the RMC field and can be overridden by the FPSCR.RN setting when R=0. Be aware of potential exceptions such as VXSNAN, OX, UX, and XX, which may set corresponding flags in the FPSCR register.
Example
Encoding
Operands
-
R
Rounding Mode Control -
VRT
Target Vector Register (upper half) -
VRB
Source Vector Register (upper half) -
RMC
Rounding Mode Control