xsrqpxp

VSX Scalar Round Quad-Precision to Extended-Precision

xsrqpxp R, VRT, VRB, RMC

Rounds a quad-precision floating-point value to extended-precision.

Details

Rounds a quad-precision floating-point value to extended-precision format, placing the result in the upper half of the target VSX register. This VSX instruction requires the quad-precision operand in the upper half of VRB and uses the rounding mode specified by RMC. The operation affects FPSCR status flags (inexact, underflow, overflow, invalid) and the R bit controls whether the result is placed in the target (R=0) or returned for testing (R=1).

Pseudocode Operation

rounding_mode ← (RMC == 0) ? FPSCR[RN] : RMC
VRT[0] ← round_quad_to_extended(VRB[0], rounding_mode)
if R == 1 then
  return VRT[0] for condition register testing
end if

Programming Note

The xsrqpxp instruction is used to round a quad-precision floating-point number to extended-precision format. Ensure that the VSX facility is enabled by checking MSR.VSX before using this instruction. The rounding mode is determined by the RMC field and can be overridden by the FPSCR.RN setting when R=0. Be aware of potential exceptions such as VXSNAN, OX, UX, and XX, which may set corresponding flags in the FPSCR register.

Example

xsrqpxp 0, v1, v3, 0

Encoding

Binary Layout
63
0
VRT
6
VRB
11
RMC
15
0
16
16
21
23
23
31
31
 
Format Z23-form
Opcode 0xFC00004A
Extension VSX
Registers Altered FPSCR

Operands

  • R
    Rounding Mode Control
  • VRT
    Target Vector Register (upper half)
  • VRB
    Source Vector Register (upper half)
  • RMC
    Rounding Mode Control