lqarx
Load Quadword And Reserve Indexed
lqarx RTp, RA, RB
Loads a quadword from memory and reserves the location for conditional store.
Encoding
Binary Layout
31
0:5
RTp
6:10
RA
11:15
RB
16:20
276
21:30
0
31
Operands
-
RTp
Target Pair -
RA
Base -
RB
Index -
EH
Hint operand
Example
lqarx r4, r4, r5
Registers Altered
RESERVE, RESERVE_LENGTH, RESERVE_ADDRRelated
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
For lqarx, the quadword in storage addressed by EA is loaded into an even-odd pair of GPRs. In Big-Endian mode, the even-numbered GPR is loaded with the doubleword from storage addressed by EA and the odd-numbered GPR is loaded with the doubleword addressed by EA+8. In Little-Endian mode, the even-numbered GPR is loaded with the byte-reversed doubleword from storage addressed by EA+8 and the odd-numbered GPR is loaded with the byte-reversed doubleword addressed by EA.
Operation
if RA = 0 then
b ← 0
else
b ← (RA)
EA ← b + (RB)
RESERVE ← 1
RESERVE_LENGTH ← 16
RESERVE_ADDR ← real_addr(EA)
RTp ← MEM(EA, 16)
Extended Mnemonics
| Extended Mnemonic | Equivalent Instruction |
|---|---|
| lqarx |
Programming Note
lqarx serves as both a basic and an extended mnemonic. The Assembler will recognize a lqarx mnemonic with four operands as the basic form, and a lqarx mnemonic with three operands as the extended form. In the extended form the EH operand is omitted and assumed to be 0.