The dataset
Every instruction on this site, as data you can download and use. 5,986 records across six architectures, released into the public domain under CC0 1.0. Use it for anything, including commercially. No permission, no attribution, no conditions. Credit is welcome but is not required.
Download
| File | Contents | Size |
|---|---|---|
| ACCURACY.md | How accuracy was measured, and what was not | 11 KB |
| LICENSE | The CC0 dedication and what it does not cover | 2 KB |
| README.md | Dataset card | 2 KB |
| amdgpu.json | AMDGPU records only | 2.5 MB |
| arm.json | ARM records only | 2.4 MB |
| instructions.jsonl | Every record, one JSON object per line | 7.5 MB |
| manifest.json | Counts, excluded fields, SHA-256 checksums | 2 KB |
| powerisa.json | POWERISA records only | 2.4 MB |
| ptx.json | PTX records only | 479 KB |
| riscv.json | RISCV records only | 912 KB |
| x86.json | X86 records only | 1.2 MB |
What a record contains
mnemonic, architecture, summary,
description, syntax, operands,
encoding (format, bit pattern, hex opcode),
pseudocode, extension, and an example where one exists.
Accuracy, and what is not measured
The data was extracted from vendor specifications by a language model and then repaired, so accuracy is measured rather than assumed. Sampling records against the vendor specifications themselves gives mnemonic corroboration of 97.9% for x86, 96.3% for ARM and RISC-V, and 94.0% for PowerISA. RISC-V encodings agree with their own bit patterns on all 406 checkable records, after 18 defects were found this way and fixed.
Two limits are worth stating plainly. Roughly a third of the corpus, PTX and AMDGPU, has no vendored reference yet and is unaudited. And semantic correctness of the prose and pseudocode is not measured at all. Treat the figures as a lower bound, and check anything safety critical against the vendor's own manual.
The full method, including three corrections made to the audit itself, is in ACCURACY.md, which ships with the dataset.
What is not included
8.37 MB of verbatim vendor manual text, most of it Intel's, is removed before release. It was reproduced on this site as a technical reference, but it is not ours to place in the public domain. Every record keeps its own summary, description, pseudocode, operands and encoding. Instruction sets, mnemonics and trademarks remain the property of Intel, AMD, Arm, IBM/OpenPOWER, RISC-V International and NVIDIA.