lwz
Load Word and Zero
lwz RT, D(RA)
Loads a word (32 bits) from memory and clears the upper 32 bits.
Encoding
Binary Layout
32
0:5
RT
6:10
RA
11:15
D
16:31
Operands
-
RT
Target Register -
D
Displacement -
RA
Base Register
Example
lwz r3, 8(r4)
// Load 32-bit int from r4+8.
Related
Across architectures
Load-Acquire : how x86, ARM, RISC-V, and PowerISA each do this.
More in Base
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
The effective address (EA) is calculated as (RA|0) + EXTS64(D). The word in storage addressed by EA is loaded into RT32:63. RT0:31 are set to 0.
Operation
EA ← (RA|0) + EXTS64(D)
RT ← 320 || MEM(EA, 4)
Programming Note
The lwz instruction is commonly used for loading a word from memory into a register while zeroing the upper half of the target register. Ensure that the address is properly aligned to avoid alignment exceptions. This instruction operates at user privilege level and does not generate any exceptions under normal circumstances.