lwzci

Load Word and Zero Caching Inhibited

lwzci RT, RA, RB

Loads a word bypassing the cache.

Details

The Load Word and Zero Caching Inhibited instruction loads a word bypassing the cache.

Pseudocode Operation

r3 <- Memory[address]

Example

lwzci r3, r4, r5

Encoding

Binary Layout

31

0

RT

6

RA

11

RB

16

855

21

/

31

Format X-form

Opcode 0x7C0006AB

Extension Base

Operands

RT
Target
RA
Base
RB
Index