mtvsrws

Move To VSR Word and Splat

mtvsrws XT, RA

Moves a 32-bit word from a GPR and replicates it across the vector.

Details

The mtvsrws instruction moves the word from bits 32 to 63 of a general-purpose register (GPR) into the first word element of a vector-scalar register (VSR). The second word element of the VSR is set to zero. This operation is treated as a Vector instruction in terms of resource availability.

Pseudocode Operation

if TX=0 & MSR.VSX=0 then VSX_Unavailable()
if TX=1 & MSR.VEC=0 then Vector_Unavailable()

VSR[32×TX+T].word[0] ← GPR[RA].bit[32:63]
VSR[32×TX+T].word[1] ← 0x0000_0000
VSR[32×TX+T].word[2] ← GPR[RA].bit[32:63]
VSR[32×TX+T].word[3] ← GPR[RA].bit[32:63]

Programming Note

The mtvsrws instruction is used to move the upper 32 bits of a general-purpose register into the first word element of a vector-scalar register and splat it across the remaining elements. Ensure that the VSX or Vector facility is enabled in the MSR before using this instruction, otherwise, an exception will be raised. This instruction treats the operation as a Vector instruction, so developers should consider resource availability accordingly.

Example

mtvsrws vs1, r4

Encoding

Binary Layout
31
0
XT
6
RA
11
0
16
243
21
 
Format XX1-form
Opcode 0x7C0000F3
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target
  • RA
    Source GPR