vrlb

Vector Rotate Left Byte

vrlb vD, vA, vB

Rotates each byte of the source vector left by a specified number of bits.

Encoding

Binary Layout

0:5

6:10

11:15

16:20

21:31

Format VX-form

Opcode 0x10000004

Extension VMX (AltiVec)

Operands

vD
Target
vA
Data
vB
Rotate Count
VRT
Target Vector Register
VRA
Source Vector Register
VRB
Shift Control Vector Register

Example

vrlb vd, va, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vrlb, each byte in VSR[VRA+32] is rotated left by the number of bits specified in the low-order 3 bits of the corresponding byte in VSR[VRB+32]. The result is stored in VSR[VRT+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 7
    src ← VSR[VRA+32].byte[i]
    sh  ← VSR[VRB+32].byte[i].bit[5:7]
    VSR[VRT+32].byte[i] ← src <<< sh

Programming Note

The vrlb instruction rotates each byte in the source vector left by a specified number of bits determined by another vector. Ensure that the Vector Facility is enabled (MSR.VEC=1) to avoid exceptions. The shift amount is derived from the high-order 3 bits of each byte in the second vector, so be cautious with bit manipulation to achieve the desired rotation.